Instruction Reference
§add
add xd, xs1, xs2 (RV32/64I)§add.uw
add.uw xd, xs1, xs2 (RV64Zba)§addi
addi xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)
addi xd, xs1, <offset> (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)§addiw
addiw xd, xs1, simm (-2048 <= simm <= 2047) (RV64I)§addw
addw xd, xs1, xs2 (RV64I)§aes32dsi
aes32dsi xd, xs1, xs2, uimm (uimm <= 0x3) (RV32Zk or RV32Zkn or RV32Zknd)§aes32dsmi
aes32dsmi xd, xs1, xs2, uimm (uimm <= 0x3) (RV32Zk or RV32Zkn or RV32Zknd)§aes32esi
aes32esi xd, xs1, xs2, uimm (uimm <= 0x3) (RV32Zk or RV32Zkn or RV32Zkne)§aes32esmi
aes32esmi xd, xs1, xs2, uimm (uimm <= 0x3) (RV32Zk or RV32Zkn or RV32Zkne)§aes64ds
aes64ds xd, xs1, xs2 (RV64Zk or RV64Zkn or RV64Zknd)§aes64dsm
aes64dsm xd, xs1, xs2 (RV64Zk or RV64Zkn or RV64Zknd)§aes64es
aes64es xd, xs1, xs2 (RV64Zk or RV64Zkn or RV64Zkne)§aes64esm
aes64esm xd, xs1, xs2 (RV64Zk or RV64Zkn or RV64Zkne)§aes64im
aes64im xd, xs1 (RV64Zk or RV64Zkn or RV64Zknd)§aes64ks1i
aes64ks1i xd, xs1, uimm (0 <= uimm <= 10) (RV64Zk or RV64Zkn or RV64Zknd or RV64Zkne)§aes64ks2
aes64ks2 xd, xs1, xs2 (RV64Zk or RV64Zkn or RV64Zknd or RV64Zkne)§amoadd.b
amoadd.b xd, xs1, [xs2] (RV32/64Zabha)§amoadd.b.aq
amoadd.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amoadd.b.aqrl
amoadd.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoadd.b.rl
amoadd.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amoadd.d
amoadd.d xd, xs1, [xs2] (RV64A)§amoadd.d.aq
amoadd.d.aq xd, xs1, [xs2] (RV64A)§amoadd.d.aqrl
amoadd.d.aqrl xd, xs1, [xs2] (RV64A)§amoadd.d.rl
amoadd.d.rl xd, xs1, [xs2] (RV64A)§amoadd.h
amoadd.h xd, xs1, [xs2] (RV32/64Zabha)§amoadd.h.aq
amoadd.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amoadd.h.aqrl
amoadd.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoadd.h.rl
amoadd.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amoadd.w
amoadd.w xd, xs1, [xs2] (RV32/64A)§amoadd.w.aq
amoadd.w.aq xd, xs1, [xs2] (RV32/64A)§amoadd.w.aqrl
amoadd.w.aqrl xd, xs1, [xs2] (RV32/64A)§amoadd.w.rl
amoadd.w.rl xd, xs1, [xs2] (RV32/64A)§amoand.b
amoand.b xd, xs1, [xs2] (RV32/64Zabha)§amoand.b.aq
amoand.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amoand.b.aqrl
amoand.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoand.b.rl
amoand.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amoand.d
amoand.d xd, xs1, [xs2] (RV64A)§amoand.d.aq
amoand.d.aq xd, xs1, [xs2] (RV64A)§amoand.d.aqrl
amoand.d.aqrl xd, xs1, [xs2] (RV64A)§amoand.d.rl
amoand.d.rl xd, xs1, [xs2] (RV64A)§amoand.h
amoand.h xd, xs1, [xs2] (RV32/64Zabha)§amoand.h.aq
amoand.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amoand.h.aqrl
amoand.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoand.h.rl
amoand.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amoand.w
amoand.w xd, xs1, [xs2] (RV32/64A)§amoand.w.aq
amoand.w.aq xd, xs1, [xs2] (RV32/64A)§amoand.w.aqrl
amoand.w.aqrl xd, xs1, [xs2] (RV32/64A)§amoand.w.rl
amoand.w.rl xd, xs1, [xs2] (RV32/64A)§amocas.b
amocas.b xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.b.aq
amocas.b.aq xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.b.aqrl
amocas.b.aqrl xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.b.rl
amocas.b.rl xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.d
amocas.d xd, xs1, [xs2] (d is even, s1 is even) (RV32Zacas)
amocas.d xd, xs1, [xs2] (RV64Zacas)§amocas.d.aq
amocas.d.aq xd, xs1, [xs2] (d is even, s1 is even) (RV32Zacas)
amocas.d.aq xd, xs1, [xs2] (RV64Zacas)§amocas.d.aqrl
amocas.d.aqrl xd, xs1, [xs2] (d is even, s1 is even) (RV32Zacas)
amocas.d.aqrl xd, xs1, [xs2] (RV64Zacas)§amocas.d.rl
amocas.d.rl xd, xs1, [xs2] (d is even, s1 is even) (RV32Zacas)
amocas.d.rl xd, xs1, [xs2] (RV64Zacas)§amocas.h
amocas.h xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.h.aq
amocas.h.aq xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.h.aqrl
amocas.h.aqrl xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.h.rl
amocas.h.rl xd, xs1, [xs2] (RV32/64Zabha_Zacas)§amocas.q
amocas.q xd, xs1, [xs2] (d is even, s1 is even) (RV64Zacas)§amocas.q.aq
amocas.q.aq xd, xs1, [xs2] (d is even, s1 is even) (RV64Zacas)§amocas.q.aqrl
amocas.q.aqrl xd, xs1, [xs2] (d is even, s1 is even) (RV64Zacas)§amocas.q.rl
amocas.q.rl xd, xs1, [xs2] (d is even, s1 is even) (RV64Zacas)§amocas.w
amocas.w xd, xs1, [xs2] (RV32/64Zacas)§amocas.w.aq
amocas.w.aq xd, xs1, [xs2] (RV32/64Zacas)§amocas.w.aqrl
amocas.w.aqrl xd, xs1, [xs2] (RV32/64Zacas)§amocas.w.rl
amocas.w.rl xd, xs1, [xs2] (RV32/64Zacas)§amomax.b
amomax.b xd, xs1, [xs2] (RV32/64Zabha)§amomax.b.aq
amomax.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amomax.b.aqrl
amomax.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amomax.b.rl
amomax.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amomax.d
amomax.d xd, xs1, [xs2] (RV64A)§amomax.d.aq
amomax.d.aq xd, xs1, [xs2] (RV64A)§amomax.d.aqrl
amomax.d.aqrl xd, xs1, [xs2] (RV64A)§amomax.d.rl
amomax.d.rl xd, xs1, [xs2] (RV64A)§amomax.h
amomax.h xd, xs1, [xs2] (RV32/64Zabha)§amomax.h.aq
amomax.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amomax.h.aqrl
amomax.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amomax.h.rl
amomax.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amomax.w
amomax.w xd, xs1, [xs2] (RV32/64A)§amomax.w.aq
amomax.w.aq xd, xs1, [xs2] (RV32/64A)§amomax.w.aqrl
amomax.w.aqrl xd, xs1, [xs2] (RV32/64A)§amomax.w.rl
amomax.w.rl xd, xs1, [xs2] (RV32/64A)§amomaxu.b
amomaxu.b xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.b.aq
amomaxu.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.b.aqrl
amomaxu.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.b.rl
amomaxu.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.d
amomaxu.d xd, xs1, [xs2] (RV64A)§amomaxu.d.aq
amomaxu.d.aq xd, xs1, [xs2] (RV64A)§amomaxu.d.aqrl
amomaxu.d.aqrl xd, xs1, [xs2] (RV64A)§amomaxu.d.rl
amomaxu.d.rl xd, xs1, [xs2] (RV64A)§amomaxu.h
amomaxu.h xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.h.aq
amomaxu.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.h.aqrl
amomaxu.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.h.rl
amomaxu.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amomaxu.w
amomaxu.w xd, xs1, [xs2] (RV32/64A)§amomaxu.w.aq
amomaxu.w.aq xd, xs1, [xs2] (RV32/64A)§amomaxu.w.aqrl
amomaxu.w.aqrl xd, xs1, [xs2] (RV32/64A)§amomaxu.w.rl
amomaxu.w.rl xd, xs1, [xs2] (RV32/64A)§amomin.b
amomin.b xd, xs1, [xs2] (RV32/64Zabha)§amomin.b.aq
amomin.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amomin.b.aqrl
amomin.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amomin.b.rl
amomin.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amomin.d
amomin.d xd, xs1, [xs2] (RV64A)§amomin.d.aq
amomin.d.aq xd, xs1, [xs2] (RV64A)§amomin.d.aqrl
amomin.d.aqrl xd, xs1, [xs2] (RV64A)§amomin.d.rl
amomin.d.rl xd, xs1, [xs2] (RV64A)§amomin.h
amomin.h xd, xs1, [xs2] (RV32/64Zabha)§amomin.h.aq
amomin.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amomin.h.aqrl
amomin.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amomin.h.rl
amomin.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amomin.w
amomin.w xd, xs1, [xs2] (RV32/64A)§amomin.w.aq
amomin.w.aq xd, xs1, [xs2] (RV32/64A)§amomin.w.aqrl
amomin.w.aqrl xd, xs1, [xs2] (RV32/64A)§amomin.w.rl
amomin.w.rl xd, xs1, [xs2] (RV32/64A)§amominu.b
amominu.b xd, xs1, [xs2] (RV32/64Zabha)§amominu.b.aq
amominu.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amominu.b.aqrl
amominu.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amominu.b.rl
amominu.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amominu.d
amominu.d xd, xs1, [xs2] (RV64A)§amominu.d.aq
amominu.d.aq xd, xs1, [xs2] (RV64A)§amominu.d.aqrl
amominu.d.aqrl xd, xs1, [xs2] (RV64A)§amominu.d.rl
amominu.d.rl xd, xs1, [xs2] (RV64A)§amominu.h
amominu.h xd, xs1, [xs2] (RV32/64Zabha)§amominu.h.aq
amominu.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amominu.h.aqrl
amominu.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amominu.h.rl
amominu.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amominu.w
amominu.w xd, xs1, [xs2] (RV32/64A)§amominu.w.aq
amominu.w.aq xd, xs1, [xs2] (RV32/64A)§amominu.w.aqrl
amominu.w.aqrl xd, xs1, [xs2] (RV32/64A)§amominu.w.rl
amominu.w.rl xd, xs1, [xs2] (RV32/64A)§amoor.b
amoor.b xd, xs1, [xs2] (RV32/64Zabha)§amoor.b.aq
amoor.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amoor.b.aqrl
amoor.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoor.b.rl
amoor.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amoor.d
amoor.d xd, xs1, [xs2] (RV64A)§amoor.d.aq
amoor.d.aq xd, xs1, [xs2] (RV64A)§amoor.d.aqrl
amoor.d.aqrl xd, xs1, [xs2] (RV64A)§amoor.d.rl
amoor.d.rl xd, xs1, [xs2] (RV64A)§amoor.h
amoor.h xd, xs1, [xs2] (RV32/64Zabha)§amoor.h.aq
amoor.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amoor.h.aqrl
amoor.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoor.h.rl
amoor.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amoor.w
amoor.w xd, xs1, [xs2] (RV32/64A)§amoor.w.aq
amoor.w.aq xd, xs1, [xs2] (RV32/64A)§amoor.w.aqrl
amoor.w.aqrl xd, xs1, [xs2] (RV32/64A)§amoor.w.rl
amoor.w.rl xd, xs1, [xs2] (RV32/64A)§amoswap.b
amoswap.b xd, xs1, [xs2] (RV32/64Zabha)§amoswap.b.aq
amoswap.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amoswap.b.aqrl
amoswap.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoswap.b.rl
amoswap.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amoswap.d
amoswap.d xd, xs1, [xs2] (RV64A)§amoswap.d.aq
amoswap.d.aq xd, xs1, [xs2] (RV64A)§amoswap.d.aqrl
amoswap.d.aqrl xd, xs1, [xs2] (RV64A)§amoswap.d.rl
amoswap.d.rl xd, xs1, [xs2] (RV64A)§amoswap.h
amoswap.h xd, xs1, [xs2] (RV32/64Zabha)§amoswap.h.aq
amoswap.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amoswap.h.aqrl
amoswap.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoswap.h.rl
amoswap.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amoswap.w
amoswap.w xd, xs1, [xs2] (RV32/64A)§amoswap.w.aq
amoswap.w.aq xd, xs1, [xs2] (RV32/64A)§amoswap.w.aqrl
amoswap.w.aqrl xd, xs1, [xs2] (RV32/64A)§amoswap.w.rl
amoswap.w.rl xd, xs1, [xs2] (RV32/64A)§amoxor.b
amoxor.b xd, xs1, [xs2] (RV32/64Zabha)§amoxor.b.aq
amoxor.b.aq xd, xs1, [xs2] (RV32/64Zabha)§amoxor.b.aqrl
amoxor.b.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoxor.b.rl
amoxor.b.rl xd, xs1, [xs2] (RV32/64Zabha)§amoxor.d
amoxor.d xd, xs1, [xs2] (RV64A)§amoxor.d.aq
amoxor.d.aq xd, xs1, [xs2] (RV64A)§amoxor.d.aqrl
amoxor.d.aqrl xd, xs1, [xs2] (RV64A)§amoxor.d.rl
amoxor.d.rl xd, xs1, [xs2] (RV64A)§amoxor.h
amoxor.h xd, xs1, [xs2] (RV32/64Zabha)§amoxor.h.aq
amoxor.h.aq xd, xs1, [xs2] (RV32/64Zabha)§amoxor.h.aqrl
amoxor.h.aqrl xd, xs1, [xs2] (RV32/64Zabha)§amoxor.h.rl
amoxor.h.rl xd, xs1, [xs2] (RV32/64Zabha)§amoxor.w
amoxor.w xd, xs1, [xs2] (RV32/64A)§amoxor.w.aq
amoxor.w.aq xd, xs1, [xs2] (RV32/64A)§amoxor.w.aqrl
amoxor.w.aqrl xd, xs1, [xs2] (RV32/64A)§amoxor.w.rl
amoxor.w.rl xd, xs1, [xs2] (RV32/64A)§and
and xd, xs1, xs2 (RV32/64I)§andi
andi xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)§andn
andn xd, xs1, xs2 (RV32/64Zbb or RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§auipc
auipc xd, <offset> (offset is the 20 highest bits of a 32-bit offset) (RV32/64I)§bclr
bclr xd, xs1, xs2 (RV32/64Zbs)§bclri
bclri xd, xs1, uimm (uimm <= 0x1F) (RV32Zbs)
bclri xd, xs1, uimm (uimm <= 0x3F) (RV64Zbs)§beq
beq xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§beqz
beqz xd, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bext
bext xd, xs1, xs2 (RV32/64Zbs)§bexti
bexti xd, xs1, uimm (uimm <= 0x1F) (RV32Zbs)
bexti xd, xs1, uimm (uimm <= 0x3F) (RV64Zbs)§bge
bge xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bgeu
bgeu xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bgez
bgez xd, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bgt
bgt xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bgtu
bgtu xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bgtz
bgtz xd, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§binv
binv xd, xs1, xs2 (RV32/64Zbs)§binvi
binvi xd, xs1, uimm (uimm <= 0x1F) (RV32Zbs)
binvi xd, xs1, uimm (uimm <= 0x3F) (RV64Zbs)§ble
ble xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bleu
bleu xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§blez
blez xd, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§blt
blt xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bltu
bltu xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bltz
bltz xd, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bne
bne xd, xs1, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§bnez
bnez xd, <offset> (offset is 11 bit, 2-byte aligned) (RV32/64I)§brev8
brev8 xd, xs1 (RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§bset
bset xd, xs1, xs2 (RV32/64Zbs)§bseti
bseti xd, xs1, uimm (uimm <= 0x1F) (RV32Zbs)
bseti xd, xs1, uimm (uimm <= 0x3F) (RV64Zbs)§c.add
c.add xd, xs1 (d cannot be 0, s1 cannot be 0) (RV32/64C)§c.addi
c.addi xd, simm (d cannot be 0, -32 <= simm <= 31, simm != 0) (RV32/64C)§c.addi16sp
c.addi16sp x2, simm (-512 <= simm <= 496, simm != 0, simm = 16 * N) (RV32/64C)§c.addi4spn
c.addi4spn xd, x2, uimm (d is 8-15, 1 <= uimm <= 1020, uimm = 4 * N) (RV32/64C)§c.addiw
c.addiw xd, simm (d cannot be 0, -32 <= simm <= 31) (RV64C)§c.addw
c.addw xd, xs1 (d is 8-15, s1 is 8-15) (RV64C)§c.and
c.and xd, xs1 (d is 8-15, s1 is 8-15) (RV32/64C)§c.andi
c.andi xd, simm (d is 8-15, -32 <= simm <= 31) (RV32/64C)§c.beqz
c.beqz xd, <offset> (d is 8-15, offset is 8 bits, 2-byte aligned) (RV32/64C)§c.bnez
c.bnez xd, <offset> (d is 8-15, offset is 8 bits, 2-byte aligned) (RV32/64C)§c.ebreak
c.ebreak (RV32/64C)§c.fld
c.fld fv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 248, uimm = 8 * N) (RV32/64CD)§c.fldsp
c.fldsp fd, [sp, uimm] (uimm <= 504, uimm = 8 * N) (RV32/64CD)§c.flw
c.flw fv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 124, uimm = 4 * N) (RV32CF)§c.flwsp
c.flwsp fd, [sp, uimm] (uimm <= 252, uimm = 4 * N) (RV32CF)§c.fsd
c.fsd fv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 248, uimm = 8 * N) (RV32/64CD)§c.fsdsp
c.fsdsp fd, [sp, uimm] (uimm <= 504, uimm = 8 * N) (RV32/64CD)§c.fsw
c.fsw fv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 124, uimm = 4 * N) (RV32CF)§c.fswsp
c.fswsp fd, [sp, uimm] (uimm <= 252, uimm = 4 * N) (RV32CF)§c.j
c.j <offset> (offset is 11 bits, 2-byte aligned) (RV32/64C)§c.jal
c.jal <offset> (offset is 11 bits, 2-byte aligned) (RV32C)§c.jalr
c.jalr xd (d cannot be 0) (RV32/64C)§c.jr
c.jr xd (d cannot be 0) (RV32/64C)§c.lbu
c.lbu xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 0x3) (RV32/64Zcb)§c.ld
c.ld xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 248, uimm = 8 * N) (RV64C)§c.ldsp
c.ldsp xd, [sp, uimm] (d cannot be 0, uimm <= 504, uimm = 8 * N) (RV64C)§c.lh
c.lh xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 2, uimm = 2 * N) (RV32/64Zcb)§c.lhu
c.lhu xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 2, uimm = 2 * N) (RV32/64Zcb)§c.li
c.li xd, simm (d cannot be 0, -32 <= simm <= 31) (RV32/64C)§c.lui
c.lui xd, simm (d cannot be 0 or 2, -0x20000 <= simm <= 0x1F000, simm != 0, simm = 0x1000 * N) (RV32/64C)§c.lw
c.lw xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 124, uimm = 4 * N) (RV32/64C)§c.lwsp
c.lwsp xd, [sp, uimm] (d cannot be 0, uimm <= 252, uimm = 4 * N) (RV32/64C)§c.mop.1
c.mop.1 (RV32/64Zcmop)§c.mop.11
c.mop.11 (RV32/64Zcmop)§c.mop.13
c.mop.13 (RV32/64Zcmop)§c.mop.15
c.mop.15 (RV32/64Zcmop)§c.mop.3
c.mop.3 (RV32/64Zcmop)§c.mop.5
c.mop.5 (RV32/64Zcmop)§c.mop.7
c.mop.7 (RV32/64Zcmop)§c.mop.9
c.mop.9 (RV32/64Zcmop)§c.mop.N
c.mop.N uimm (1 <= uimm <= 15, uimm = 2 * N + 1) (RV32/64Zcmop)§c.mul
c.mul xd, xs1 (d is 8-15, s1 is 8-15) (RV32/64MZcb)§c.mv
c.mv xd, xs1 (d cannot be 0, s1 cannot be 0) (RV32/64C)§c.nop
c.nop (RV32/64C)§c.not
c.not xd (d is 8-15) (RV32/64Zcb)§c.ntl.all
c.ntl.all (RV32/64CZihintntl)§c.ntl.p1
c.ntl.p1 (RV32/64CZihintntl)§c.ntl.pall
c.ntl.pall (RV32/64CZihintntl)§c.ntl.s1
c.ntl.s1 (RV32/64CZihintntl)§c.or
c.or xd, xs1 (d is 8-15, s1 is 8-15) (RV32/64C)§c.sb
c.sb xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 0x3) (RV32/64Zcb)§c.sd
c.sd xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 248, uimm = 8 * N) (RV64C)§c.sdsp
c.sdsp xd, [sp, uimm] (uimm <= 504, uimm = 8 * N) (RV64C)§c.sext.b
c.sext.b xd (d is 8-15) (RV32/64Zbb_Zcb)§c.sext.h
c.sext.h xd (d is 8-15) (RV32/64Zbb_Zcb)§c.sext.w
c.sext.w xd (d cannot be 0) (RV64Zbb_Zcb)§c.sh
c.sh xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 2, uimm = 2 * N) (RV32/64Zbb_Zcb)§c.slli
c.slli xd, uimm (d cannot be 0, 1 <= uimm <= 31) (RV32C)
c.slli xd, uimm (d cannot be 0, 1 <= uimm <= 63) (RV64C)§c.srai
c.srai xd, uimm (d is 8-15, 1 <= uimm <= 31) (RV32C)
c.srai xd, uimm (d is 8-15, 1 <= uimm <= 63) (RV64C)§c.srli
c.srli xd, uimm (d is 8-15, 1 <= uimm <= 31) (RV32C)
c.srli xd, uimm (d is 8-15, 1 <= uimm <= 63) (RV64C)§c.sspopchk
c.sspopchk x5 (RV32/64Zcmop_Zicfiss)§c.sspush
c.sspush x1 (RV32/64Zcmop_Zicfiss)§c.sub
c.sub xd, xs1 (d is 8-15, s1 is 8-15) (RV32/64C)§c.subw
c.subw xd, xs1 (d is 8-15, s1 is 8-15) (RV64C)§c.sw
c.sw xv, [xb, uimm] (v is 8-15, b is 8-15, uimm <= 124, uimm = 4 * N) (RV32/64C)§c.swsp
c.swsp xd, [sp, uimm] (uimm <= 252, uimm = 4 * N) (RV32/64C)§c.unimp
c.unimp (RV32/64C)§c.xor
c.xor xd, xs1 (d is 8-15, s1 is 8-15) (RV32/64C)§c.zext.b
c.zext.b xd (d is 8-15) (RV32/64Zcb)§c.zext.h
c.zext.h xd (d is 8-15) (RV32/64Zbb_Zcb)§c.zext.w
c.zext.w xd (d is 8-15) (RV64Zba_Zcb)§call
call <offset> (offset is 32 bits) (RV32/64I)
call xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§cbo.clean
cbo.clean [xd] (RV32/64Zicbom)§cbo.flush
cbo.flush [xd] (RV32/64Zicbom)§cbo.inval
cbo.inval [xd] (RV32/64Zicbom)§cbo.zero
cbo.zero [xd] (RV32/64Zicboz)§clmul
clmul xd, xs1, xs2 (RV32/64Zbc or RV32/64Zbkc or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§clmulh
clmulh xd, xs1, xs2 (RV32/64Zbc or RV32/64Zbkc or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§clmulr
clmulr xd, xs1, xs2 (RV32/64Zbc)§clz
clz xd, xs1 (RV32/64Zbb)§clzw
clzw xd, xs1 (RV64Zbb)§cm.jalt
cm.jalt uimm (32 <= uimm <= 255) (RV32/64Zcmt)§cm.jt
cm.jt uimm (0 <= uimm <= 31) (RV32/64Zcmt)§cm.mva01s
cm.mva01s xd, xs1 (d is 8, 9, or 18-23, s1 is 8, 9, or 18-23) (RV32/64Zcmp)§cm.mvsa01
cm.mvsa01 xd, xs1 (d is 8, 9, or 18-23, s1 is 8, 9, or 18-23, s1 != d) (RV32/64Zcmp)§cm.pop
cm.pop {reg_list}, spimm (spimm = round_up(reglist_space, 16) + [0|16|32|48]) (RV32/64Zcmp)§cm.popret
cm.popret {reg_list}, spimm (spimm = round_up(reglist_space, 16) + [0|16|32|48]) (RV32/64Zcmp)§cm.popretz
cm.popretz {reg_list}, spimm (spimm = round_up(reglist_space, 16) + [0|16|32|48]) (RV32/64Zcmp)§cm.push
cm.push {reg_list}, nspimm (nspimm = -(round_up(reglist_space, 16) + [0|16|32|48])) (RV32/64Zcmp)§cpop
cpop xd, xs1 (RV32/64Zbb)§cpopw
cpopw xd, xs1 (RV64Zbb)§csrc
csrc <csr>, xd (RV32/64Zicsr)§csrci
csrci <csr>, uimm (uimm <= 0x1F) (RV32/64Zicsr)§csrr
csrr xd, <csr> (RV32/64Zicsr)§csrrc
csrrc xd, <csr>, xs1 (RV32/64Zicsr)§csrrci
csrrci xd, <csr>, uimm (uimm <= 0x1F) (RV32/64Zicsr)§csrrs
csrrs xd, <csr>, xs1 (RV32/64Zicsr)§csrrsi
csrrsi xd, <csr>, uimm (uimm <= 0x1F) (RV32/64Zicsr)§csrrw
csrrw xd, <csr>, xs1 (RV32/64Zicsr)§csrrwi
csrrwi xd, <csr>, uimm (uimm <= 0x1F) (RV32/64Zicsr)§csrs
csrs <csr>, xd (RV32/64Zicsr)§csrsi
csrsi <csr>, uimm (uimm <= 0x1F) (RV32/64Zicsr)§csrw
csrw <csr>, xd (RV32/64Zicsr)§csrwi
csrwi <csr>, uimm (uimm <= 0x1F) (RV32/64Zicsr)§ctz
ctz xd, xs1 (RV32/64Zbb)§ctzw
ctzw xd, xs1 (RV64Zbb)§czero.eqz
czero.eqz xd, xs1, xs2 (RV32/64Zicond)§czero.nez
czero.nez xd, xs1, xs2 (RV32/64Zicond)§div
div xd, xs1, xs2 (RV32/64M)§divu
divu xd, xs1, xs2 (RV32/64M)§divuw
divuw xd, xs1, xs2 (RV64M)§divw
divw xd, xs1, xs2 (RV64M)§ebreak
ebreak (RV32/64I)§ecall
ecall (RV32/64I)§fabs.d
fabs.d fd, fs1 (RV32/64D)
fabs.d xd, xs1 (d is even, s1 is even) (RV32Zdinx)
fabs.d xd, xs1 (RV64Zdinx)§fabs.h
fabs.h fd, fs1 (RV32/64Zfh)
fabs.h xd, xs1 (RV32/64Zhinx)§fabs.q
fabs.q fd, fs1 (RV32/64Q)§fabs.s
fabs.s fd, fs1 (RV32/64F)
fabs.s xd, xs1 (RV32/64Zfinx)§fadd.d
fadd.d fd, fs1, fs2, <rounding mode> (RV32/64D)
fadd.d xd, xs1, xs2, <rounding mode> (d is even, s1 is even, s2 is even) (RV32Zdinx)
fadd.d xd, xs1, xs2, <rounding mode> (RV64Zdinx)
fadd.d fd, fs1, fs2 (RV32/64D)
fadd.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fadd.d xd, xs1, xs2 (RV64Zdinx)§fadd.h
fadd.h fd, fs1, fs2, <rounding mode> (RV32/64Zfh)
fadd.h xd, xs1, xs2, <rounding mode> (RV32/64Zhinx)
fadd.h fd, fs1, fs2 (RV32/64Zfh)
fadd.h xd, xs1, xs2 (RV32/64Zhinx)§fadd.q
fadd.q fd, fs1, fs2, <rounding mode> (RV32/64Q)
fadd.q fd, fs1, fs2 (RV32/64Q)§fadd.s
fadd.s fd, fs1, fs2, <rounding mode> (RV32/64F)
fadd.s xd, xs1, xs2, <rounding mode> (RV32/64Zfinx)
fadd.s fd, fs1, fs2 (RV32/64F)
fadd.s xd, xs1, xs2 (RV32/64Zfinx)§fclass.d
fclass.d xd, fs1 (RV32/64D)
fclass.d xd, xs1 (s1 is even) (RV32Zdinx)
fclass.d xd, xs1 (RV64Zdinx)§fclass.h
fclass.h xd, fs1 (RV32/64Zfh)
fclass.h xd, xs1 (RV32/64Zhinx)§fclass.q
fclass.q xd, fs1 (RV32/64Q)§fclass.s
fclass.s xd, fs1 (RV32/64F)
fclass.s xd, xs1 (RV32/64Zfinx)§fcvt.bf16.s
fcvt.bf16.s fd, fs1, <rounding mode> (RV32/64Zfbfmin)
fcvt.bf16.s fd, fs1 (RV32/64Zfbfmin)§fcvt.d.h
fcvt.d.h fd, fs1 (RV32/64DZfh or RV32/64DZfhmin)
fcvt.d.h xd, xs1 (d is even) (RV32Zdinx_Zhinx or RV32Zdinx_Zhinxmin)
fcvt.d.h xd, xs1 (RV64Zdinx_Zhinx or RV64Zdinx_Zhinxmin)§fcvt.d.l
fcvt.d.l fd, xs1, <rounding mode> (RV64D)
fcvt.d.l xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.d.l fd, xs1 (RV64D)
fcvt.d.l xd, xs1 (RV64Zdinx)§fcvt.d.lu
fcvt.d.lu fd, xs1, <rounding mode> (RV64D)
fcvt.d.lu xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.d.lu fd, xs1 (RV64D)
fcvt.d.lu xd, xs1 (RV64Zdinx)§fcvt.d.q
fcvt.d.q fd, fs1, <rounding mode> (RV32/64Q)
fcvt.d.q fd, fs1 (RV32/64Q)§fcvt.d.s
fcvt.d.s fd, fs1 (RV32/64D)
fcvt.d.s xd, xs1 (d is even, s1 is even) (RV32Zdinx)
fcvt.d.s xd, xs1 (RV64Zdinx)§fcvt.d.w
fcvt.d.w fd, xs1 (RV32/64D)
fcvt.d.w xd, xs1 (d is even) (RV32Zdinx)
fcvt.d.w xd, xs1 (RV64Zdinx)§fcvt.d.wu
fcvt.d.wu fd, xs1 (RV32/64D)
fcvt.d.wu xd, xs1 (d is even) (RV32Zdinx)
fcvt.d.wu xd, xs1 (RV64Zdinx)§fcvt.h.d
fcvt.h.d fd, fs1, <rounding mode> (RV32/64DZfh or RV32/64DZfhmin)
fcvt.h.d xd, xs1, <rounding mode> (s1 is even) (RV32Zdinx_Zhinx or RV32Zdinx_Zhinxmin)
fcvt.h.d xd, xs1, <rounding mode> (RV64Zdinx_Zhinx or RV64Zdinx_Zhinxmin)
fcvt.h.d fd, fs1 (RV32/64DZfh or RV32/64DZfhmin)
fcvt.h.d xd, xs1 (s1 is even) (RV32Zdinx_Zhinx or RV32Zdinx_Zhinxmin)
fcvt.h.d xd, xs1 (RV64Zdinx_Zhinx or RV64Zdinx_Zhinxmin)§fcvt.h.l
fcvt.h.l fd, xs1, <rounding mode> (RV64Zfh)
fcvt.h.l xd, xs1, <rounding mode> (RV64Zhinx)
fcvt.h.l fd, xs1 (RV64Zfh)
fcvt.h.l xd, xs1 (RV64Zhinx)§fcvt.h.lu
fcvt.h.lu fd, xs1, <rounding mode> (RV64Zfh)
fcvt.h.lu xd, xs1, <rounding mode> (RV64Zhinx)
fcvt.h.lu fd, xs1 (RV64Zfh)
fcvt.h.lu xd, xs1 (RV64Zhinx)§fcvt.h.q
fcvt.h.q fd, fs1, <rounding mode> (RV32/64QZfh or RV32/64QZfhmin)
fcvt.h.q fd, fs1 (RV32/64QZfh or RV32/64QZfhmin)§fcvt.h.s
fcvt.h.s fd, fs1, <rounding mode> (RV32/64Zfh or RV32/64Zfhmin)
fcvt.h.s xd, xs1, <rounding mode> (RV32/64Zhinx or RV32/64Zhinxmin)
fcvt.h.s fd, fs1 (RV32/64Zfh or RV32/64Zfhmin)
fcvt.h.s xd, xs1 (RV32/64Zhinx or RV32/64Zhinxmin)§fcvt.h.w
fcvt.h.w fd, xs1, <rounding mode> (RV32/64Zfh)
fcvt.h.w xd, xs1, <rounding mode> (RV32/64Zhinx)
fcvt.h.w fd, xs1 (RV32/64Zfh)
fcvt.h.w xd, xs1 (RV32/64Zhinx)§fcvt.h.wu
fcvt.h.wu fd, xs1, <rounding mode> (RV32/64Zfh)
fcvt.h.wu xd, xs1, <rounding mode> (RV32/64Zhinx)
fcvt.h.wu fd, xs1 (RV32/64Zfh)
fcvt.h.wu xd, xs1 (RV32/64Zhinx)§fcvt.l.d
fcvt.l.d xd, fs1, <rounding mode> (RV64D)
fcvt.l.d xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.l.d xd, fs1 (RV64D)
fcvt.l.d xd, xs1 (RV64Zdinx)§fcvt.l.h
fcvt.l.h xd, fs1, <rounding mode> (RV64Zfh)
fcvt.l.h xd, xs1, <rounding mode> (RV64Zhinx)
fcvt.l.h xd, fs1 (RV64Zfh)
fcvt.l.h xd, xs1 (RV64Zhinx)§fcvt.l.q
fcvt.l.q xd, fs1, <rounding mode> (RV64Q)
fcvt.l.q xd, fs1 (RV64Q)§fcvt.l.s
fcvt.l.s xd, fs1, <rounding mode> (RV64F)
fcvt.l.s xd, xs1, <rounding mode> (RV64Zfinx)
fcvt.l.s xd, fs1 (RV64F)
fcvt.l.s xd, xs1 (RV64Zfinx)§fcvt.lu.d
fcvt.lu.d xd, fs1, <rounding mode> (RV64D)
fcvt.lu.d xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.lu.d xd, fs1 (RV64D)
fcvt.lu.d xd, xs1 (RV64Zdinx)§fcvt.lu.h
fcvt.lu.h xd, fs1, <rounding mode> (RV64Zfh)
fcvt.lu.h xd, xs1, <rounding mode> (RV64Zhinx)
fcvt.lu.h xd, fs1 (RV64Zfh)
fcvt.lu.h xd, xs1 (RV64Zhinx)§fcvt.lu.q
fcvt.lu.q xd, fs1, <rounding mode> (RV64Q)
fcvt.lu.q xd, fs1 (RV64Q)§fcvt.lu.s
fcvt.lu.s xd, fs1, <rounding mode> (RV64F)
fcvt.lu.s xd, xs1, <rounding mode> (RV64Zfinx)
fcvt.lu.s xd, fs1 (RV64F)
fcvt.lu.s xd, xs1 (RV64Zfinx)§fcvt.q.d
fcvt.q.d fd, fs1 (RV32/64Q)§fcvt.q.h
fcvt.q.h fd, fs1 (RV32/64QZfh or RV32/64QZfhmin)§fcvt.q.l
fcvt.q.l fd, xs1 (RV64Q)§fcvt.q.lu
fcvt.q.lu fd, xs1 (RV64Q)§fcvt.q.s
fcvt.q.s fd, fs1 (RV32/64Q)§fcvt.q.w
fcvt.q.w fd, xs1 (RV32/64Q)§fcvt.q.wu
fcvt.q.wu fd, xs1 (RV32/64Q)§fcvt.s.bf16
fcvt.s.bf16 fd, fs1 (RV32/64Zfbfmin)§fcvt.s.d
fcvt.s.d fd, fs1, <rounding mode> (RV32/64D)
fcvt.s.d xd, xs1, <rounding mode> (d is even, s1 is even) (RV32Zdinx)
fcvt.s.d xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.s.d fd, fs1 (RV32/64D)
fcvt.s.d xd, xs1 (d is even, s1 is even) (RV32Zdinx)
fcvt.s.d xd, xs1 (RV64Zdinx)§fcvt.s.h
fcvt.s.h fd, fs1 (RV32/64Zfh or RV32/64Zfhmin)
fcvt.s.h xd, xs1 (RV32/64Zhinx or RV32/64Zhinxmin)§fcvt.s.l
fcvt.s.l fd, xs1, <rounding mode> (RV64F)
fcvt.s.l xd, xs1, <rounding mode> (RV64Zfinx)
fcvt.s.l fd, xs1 (RV64F)
fcvt.s.l xd, xs1 (RV64Zfinx)§fcvt.s.lu
fcvt.s.lu fd, xs1, <rounding mode> (RV64F)
fcvt.s.lu xd, xs1, <rounding mode> (RV64Zfinx)
fcvt.s.lu fd, xs1 (RV64F)
fcvt.s.lu xd, xs1 (RV64Zfinx)§fcvt.s.q
fcvt.s.q fd, fs1, <rounding mode> (RV32/64Q)
fcvt.s.q fd, fs1 (RV32/64Q)§fcvt.s.w
fcvt.s.w fd, xs1, <rounding mode> (RV32/64F)
fcvt.s.w xd, xs1, <rounding mode> (RV32/64Zfinx)
fcvt.s.w fd, xs1 (RV32/64F)
fcvt.s.w xd, xs1 (RV32/64Zfinx)§fcvt.s.wu
fcvt.s.wu fd, xs1, <rounding mode> (RV32/64F)
fcvt.s.wu xd, xs1, <rounding mode> (RV32/64Zfinx)
fcvt.s.wu fd, xs1 (RV32/64F)
fcvt.s.wu xd, xs1 (RV32/64Zfinx)§fcvt.w.d
fcvt.w.d xd, fs1, <rounding mode> (RV32/64D)
fcvt.w.d xd, xs1, <rounding mode> (s1 is even) (RV32Zdinx)
fcvt.w.d xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.w.d xd, fs1 (RV32/64D)
fcvt.w.d xd, xs1 (s1 is even) (RV32Zdinx)
fcvt.w.d xd, xs1 (RV64Zdinx)§fcvt.w.h
fcvt.w.h xd, fs1, <rounding mode> (RV32/64Zfh)
fcvt.w.h xd, xs1, <rounding mode> (RV32/64Zhinx)
fcvt.w.h xd, fs1 (RV32/64Zfh)
fcvt.w.h xd, xs1 (RV32/64Zhinx)§fcvt.w.q
fcvt.w.q xd, fs1, <rounding mode> (RV32/64Q)
fcvt.w.q xd, fs1 (RV32/64Q)§fcvt.w.s
fcvt.w.s xd, fs1, <rounding mode> (RV32/64F)
fcvt.w.s xd, xs1, <rounding mode> (RV32/64Zfinx)
fcvt.w.s xd, fs1 (RV32/64F)
fcvt.w.s xd, xs1 (RV32/64Zfinx)§fcvt.wu.d
fcvt.wu.d xd, fs1, <rounding mode> (RV32/64D)
fcvt.wu.d xd, xs1, <rounding mode> (s1 is even) (RV32Zdinx)
fcvt.wu.d xd, xs1, <rounding mode> (RV64Zdinx)
fcvt.wu.d xd, fs1 (RV32/64D)
fcvt.wu.d xd, xs1 (s1 is even) (RV32Zdinx)
fcvt.wu.d xd, xs1 (RV64Zdinx)§fcvt.wu.h
fcvt.wu.h xd, fs1, <rounding mode> (RV32/64Zfh)
fcvt.wu.h xd, xs1, <rounding mode> (RV32/64Zhinx)
fcvt.wu.h xd, fs1 (RV32/64Zfh)
fcvt.wu.h xd, xs1 (RV32/64Zhinx)§fcvt.wu.q
fcvt.wu.q xd, fs1, <rounding mode> (RV32/64Q)
fcvt.wu.q xd, fs1 (RV32/64Q)§fcvt.wu.s
fcvt.wu.s xd, fs1, <rounding mode> (RV32/64F)
fcvt.wu.s xd, xs1, <rounding mode> (RV32/64Zfinx)
fcvt.wu.s xd, fs1 (RV32/64F)
fcvt.wu.s xd, xs1 (RV32/64Zfinx)§fcvtmod.w.d
fcvtmod.w.d xd, fs1, rtz (RV32/64DZfa)§fdiv.d
fdiv.d fd, fs1, fs2, <rounding mode> (RV32/64D)
fdiv.d xd, xs1, xs2, <rounding mode> (d is even, s1 is even, s2 is even) (RV32Zdinx)
fdiv.d xd, xs1, xs2, <rounding mode> (RV64Zdinx)
fdiv.d fd, fs1, fs2 (RV32/64D)
fdiv.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fdiv.d xd, xs1, xs2 (RV64Zdinx)§fdiv.h
fdiv.h fd, fs1, fs2, <rounding mode> (RV32/64Zfh)
fdiv.h xd, xs1, xs2, <rounding mode> (RV32/64Zhinx)
fdiv.h fd, fs1, fs2 (RV32/64Zfh)
fdiv.h xd, xs1, xs2 (RV32/64Zhinx)§fdiv.q
fdiv.q fd, fs1, fs2, <rounding mode> (RV32/64Q)
fdiv.q fd, fs1, fs2 (RV32/64Q)§fdiv.s
fdiv.s fd, fs1, fs2, <rounding mode> (RV32/64F)
fdiv.s xd, xs1, xs2, <rounding mode> (RV32/64Zfinx)
fdiv.s fd, fs1, fs2 (RV32/64F)
fdiv.s xd, xs1, xs2 (RV32/64Zfinx)§fence
fence <fence spec>, <fence spec> (RV32/64I)
fence (RV32/64I)§fence.i
fence.i (RV32/64Zifencei)§fence.tso
fence.tso (RV32/64I)§feq.d
feq.d xd, fs1, fs2 (RV32/64D)
feq.d xd, xs1, xs2 (s1 is even, s2 is even) (RV32Zdinx)
feq.d xd, xs1, xs2 (RV64Zdinx)§feq.h
feq.h xd, fs1, fs2 (RV32/64Zfh)
feq.h xd, xs1, xs2 (RV32/64Zhinx)§feq.q
feq.q xd, fs1, fs2 (RV32/64Q)§feq.s
feq.s xd, fs1, fs2 (RV32/64F)
feq.s xd, xs1, xs2 (RV32/64Zfinx)§fld
fld fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64D)
fld fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64D)
fld fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64D)§fle.d
fle.d xd, fs1, fs2 (RV32/64D)
fle.d xd, xs1, xs2 (s1 is even, s2 is even) (RV32Zdinx)
fle.d xd, xs1, xs2 (RV64Zdinx)§fle.h
fle.h xd, fs1, fs2 (RV32/64Zfh)
fle.h xd, xs1, xs2 (RV32/64Zhinx)§fle.q
fle.q xd, fs1, fs2 (RV32/64Q)§fle.s
fle.s xd, fs1, fs2 (RV32/64F)
fle.s xd, xs1, xs2 (RV32/64Zfinx)§fleq.d
fleq.d xd, fs1, fs2 (RV32/64DZfa)§fleq.h
fleq.h xd, fs1, fs2 (RV32/64Zfa_Zfh)§fleq.q
fleq.q xd, fs1, fs2 (RV32/64QZfa)§fleq.s
fleq.s xd, fs1, fs2 (RV32/64FZfa)§flh
flh fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64Zfh or RV32/64Zfhmin)
flh fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64Zfh or RV32/64Zfhmin)
flh fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64Zfh or RV32/64Zfhmin)§fli.d
fli.d fd, fimm (fimm is a floating point immediate) (RV32/64DZfa)§fli.h
fli.h fd, fimm (fimm is a floating point immediate) (RV32/64Zfa_Zfh)§fli.q
fli.q fd, fimm (fimm is a floating point immediate) (RV32/64QZfa)§fli.s
fli.s fd, fimm (fimm is a floating point immediate) (RV32/64FZfa)§flq
flq fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64Q)
flq fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64Q)
flq fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64Q)§flt.d
flt.d xd, fs1, fs2 (RV32/64D)
flt.d xd, xs1, xs2 (s1 is even, s2 is even) (RV32Zdinx)
flt.d xd, xs1, xs2 (RV64Zdinx)§flt.h
flt.h xd, fs1, fs2 (RV32/64Zfh)
flt.h xd, xs1, xs2 (RV32/64Zhinx)§flt.q
flt.q xd, fs1, fs2 (RV32/64Q)§flt.s
flt.s xd, fs1, fs2 (RV32/64F)
flt.s xd, xs1, xs2 (RV32/64Zfinx)§fltq.d
fltq.d xd, fs1, fs2 (RV32/64DZfa)§fltq.h
fltq.h xd, fs1, fs2 (RV32/64Zfa_Zfh)§fltq.q
fltq.q xd, fs1, fs2 (RV32/64QZfa)§fltq.s
fltq.s xd, fs1, fs2 (RV32/64FZfa)§flw
flw fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64F)
flw fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64F)
flw fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64F)§fmadd.d
fmadd.d fd, fs1, fs2, fs3, <rounding mode> (RV32/64D)
fmadd.d xd, xs1, xs2, xs3, <rounding mode> (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fmadd.d xd, xs1, xs2, xs3, <rounding mode> (RV64Zdinx)
fmadd.d fd, fs1, fs2, fs3 (RV32/64D)
fmadd.d xd, xs1, xs2, xs3 (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fmadd.d xd, xs1, xs2, xs3 (RV64Zdinx)§fmadd.h
fmadd.h fd, fs1, fs2, fs3, <rounding mode> (RV32/64Zfh)
fmadd.h xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zhinx)
fmadd.h fd, fs1, fs2, fs3 (RV32/64Zfh)
fmadd.h xd, xs1, xs2, xs3 (RV32/64Zhinx)§fmadd.q
fmadd.q fd, fs1, fs2, fs3, <rounding mode> (RV32/64Q)
fmadd.q fd, fs1, fs2, fs3 (RV32/64Q)§fmadd.s
fmadd.s fd, fs1, fs2, fs3, <rounding mode> (RV32/64F)
fmadd.s xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zfinx)
fmadd.s fd, fs1, fs2, fs3 (RV32/64F)
fmadd.s xd, xs1, xs2, xs3 (RV32/64Zfinx)§fmax.d
fmax.d fd, fs1, fs2 (RV32/64D)
fmax.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fmax.d xd, xs1, xs2 (RV64Zdinx)§fmax.h
fmax.h fd, fs1, fs2 (RV32/64Zfh)
fmax.h xd, xs1, xs2 (RV32/64Zhinx)§fmax.q
fmax.q fd, fs1, fs2 (RV32/64Q)§fmax.s
fmax.s fd, fs1, fs2 (RV32/64F)
fmax.s xd, xs1, xs2 (RV32/64Zfinx)§fmaxm.d
fmaxm.d fd, fs1, fs2 (RV32/64DZfa)§fmaxm.h
fmaxm.h fd, fs1, fs2 (RV32/64Zfa_Zfh)§fmaxm.q
fmaxm.q fd, fs1, fs2 (RV32/64QZfa)§fmaxm.s
fmaxm.s fd, fs1, fs2 (RV32/64FZfa)§fmin.d
fmin.d fd, fs1, fs2 (RV32/64D)
fmin.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fmin.d xd, xs1, xs2 (RV64Zdinx)§fmin.h
fmin.h fd, fs1, fs2 (RV32/64Zfh)
fmin.h xd, xs1, xs2 (RV32/64Zhinx)§fmin.q
fmin.q fd, fs1, fs2 (RV32/64Q)§fmin.s
fmin.s fd, fs1, fs2 (RV32/64F)
fmin.s xd, xs1, xs2 (RV32/64Zfinx)§fminm.d
fminm.d fd, fs1, fs2 (RV32/64DZfa)§fminm.h
fminm.h fd, fs1, fs2 (RV32/64Zfa_Zfh)§fminm.q
fminm.q fd, fs1, fs2 (RV32/64QZfa)§fminm.s
fminm.s fd, fs1, fs2 (RV32/64FZfa)§fmsub.d
fmsub.d fd, fs1, fs2, fs3, <rounding mode> (RV32/64D)
fmsub.d xd, xs1, xs2, xs3, <rounding mode> (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fmsub.d xd, xs1, xs2, xs3, <rounding mode> (RV64Zdinx)
fmsub.d fd, fs1, fs2, fs3 (RV32/64D)
fmsub.d xd, xs1, xs2, xs3 (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fmsub.d xd, xs1, xs2, xs3 (RV64Zdinx)§fmsub.h
fmsub.h fd, fs1, fs2, fs3, <rounding mode> (RV32/64Zfh)
fmsub.h xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zhinx)
fmsub.h fd, fs1, fs2, fs3 (RV32/64Zfh)
fmsub.h xd, xs1, xs2, xs3 (RV32/64Zhinx)§fmsub.q
fmsub.q fd, fs1, fs2, fs3, <rounding mode> (RV32/64Q)
fmsub.q fd, fs1, fs2, fs3 (RV32/64Q)§fmsub.s
fmsub.s fd, fs1, fs2, fs3, <rounding mode> (RV32/64F)
fmsub.s xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zfinx)
fmsub.s fd, fs1, fs2, fs3 (RV32/64F)
fmsub.s xd, xs1, xs2, xs3 (RV32/64Zfinx)§fmul.d
fmul.d fd, fs1, fs2, <rounding mode> (RV32/64D)
fmul.d xd, xs1, xs2, <rounding mode> (d is even, s1 is even, s2 is even) (RV32Zdinx)
fmul.d xd, xs1, xs2, <rounding mode> (RV64Zdinx)
fmul.d fd, fs1, fs2 (RV32/64D)
fmul.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fmul.d xd, xs1, xs2 (RV64Zdinx)§fmul.h
fmul.h fd, fs1, fs2, <rounding mode> (RV32/64Zfh)
fmul.h xd, xs1, xs2, <rounding mode> (RV32/64Zhinx)
fmul.h fd, fs1, fs2 (RV32/64Zfh)
fmul.h xd, xs1, xs2 (RV32/64Zhinx)§fmul.q
fmul.q fd, fs1, fs2, <rounding mode> (RV32/64Q)
fmul.q fd, fs1, fs2 (RV32/64Q)§fmul.s
fmul.s fd, fs1, fs2, <rounding mode> (RV32/64F)
fmul.s xd, xs1, xs2, <rounding mode> (RV32/64Zfinx)
fmul.s fd, fs1, fs2 (RV32/64F)
fmul.s xd, xs1, xs2 (RV32/64Zfinx)§fmv.d
fmv.d fd, fs1 (RV32/64D)
fmv.d xd, xs1 (d is even, s1 is even) (RV32Zdinx)
fmv.d xd, xs1 (RV64Zdinx)§fmv.d.x
fmv.d.x fd, xs1 (RV64D)§fmv.h
fmv.h fd, fs1 (RV32/64Zfh)
fmv.h xd, xs1 (RV32/64Zhinx)§fmv.h.x
fmv.h.x fd, xs1 (RV32/64Zfh or RV32/64Zfhmin)§fmv.q
fmv.q fd, fs1 (RV32/64Q)§fmv.s
fmv.s fd, fs1 (RV32/64F)
fmv.s xd, xs1 (RV32/64Zfinx)§fmv.s.x
fmv.s.x fd, xs1 (RV32/64F)§fmv.w.x
fmv.w.x fd, xs1 (RV32/64F)§fmv.x.d
fmv.x.d xd, fs1 (RV64D)§fmv.x.h
fmv.x.h xd, fs1 (RV32/64Zfh or RV32/64Zfhmin)§fmv.x.s
fmv.x.s xd, fs1 (RV32/64F)§fmv.x.w
fmv.x.w xd, fs1 (RV32/64F)§fmvh.x.d
fmvh.x.d xd, fs1 (RV32DZfa)§fmvh.x.q
fmvh.x.q xd, fs1 (RV64QZfa)§fmvp.d.x
fmvp.d.x fd, xs1, xs2 (RV32DZfa)§fmvp.q.x
fmvp.q.x fd, xs1, xs2 (RV64QZfa)§fneg.d
fneg.d fd, fs1 (RV32/64D)
fneg.d xd, xs1 (d is even, s1 is even) (RV32Zdinx)
fneg.d xd, xs1 (RV64Zdinx)§fneg.h
fneg.h fd, fs1 (RV32/64Zfh)
fneg.h xd, xs1 (RV32/64Zhinx)§fneg.q
fneg.q fd, fs1 (RV32/64Q)§fneg.s
fneg.s fd, fs1 (RV32/64F)
fneg.s xd, xs1 (RV32/64Zfinx)§fnmadd.d
fnmadd.d fd, fs1, fs2, fs3, <rounding mode> (RV32/64D)
fnmadd.d xd, xs1, xs2, xs3, <rounding mode> (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fnmadd.d xd, xs1, xs2, xs3, <rounding mode> (RV64Zdinx)
fnmadd.d fd, fs1, fs2, fs3 (RV32/64D)
fnmadd.d xd, xs1, xs2, xs3 (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fnmadd.d xd, xs1, xs2, xs3 (RV64Zdinx)§fnmadd.h
fnmadd.h fd, fs1, fs2, fs3, <rounding mode> (RV32/64Zfh)
fnmadd.h xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zhinx)
fnmadd.h fd, fs1, fs2, fs3 (RV32/64Zfh)
fnmadd.h xd, xs1, xs2, xs3 (RV32/64Zhinx)§fnmadd.q
fnmadd.q fd, fs1, fs2, fs3, <rounding mode> (RV32/64Q)
fnmadd.q fd, fs1, fs2, fs3 (RV32/64Q)§fnmadd.s
fnmadd.s fd, fs1, fs2, fs3, <rounding mode> (RV32/64F)
fnmadd.s xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zfinx)
fnmadd.s fd, fs1, fs2, fs3 (RV32/64F)
fnmadd.s xd, xs1, xs2, xs3 (RV32/64Zfinx)§fnmsub.d
fnmsub.d fd, fs1, fs2, fs3, <rounding mode> (RV32/64D)
fnmsub.d xd, xs1, xs2, xs3, <rounding mode> (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fnmsub.d xd, xs1, xs2, xs3, <rounding mode> (RV64Zdinx)
fnmsub.d fd, fs1, fs2, fs3 (RV32/64D)
fnmsub.d xd, xs1, xs2, xs3 (d is even, s1 is even, s2 is even, s3 is even) (RV32Zdinx)
fnmsub.d xd, xs1, xs2, xs3 (RV64Zdinx)§fnmsub.h
fnmsub.h fd, fs1, fs2, fs3, <rounding mode> (RV32/64Zfh)
fnmsub.h xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zhinx)
fnmsub.h fd, fs1, fs2, fs3 (RV32/64Zfh)
fnmsub.h xd, xs1, xs2, xs3 (RV32/64Zhinx)§fnmsub.q
fnmsub.q fd, fs1, fs2, fs3, <rounding mode> (RV32/64Q)
fnmsub.q fd, fs1, fs2, fs3 (RV32/64Q)§fnmsub.s
fnmsub.s fd, fs1, fs2, fs3, <rounding mode> (RV32/64F)
fnmsub.s xd, xs1, xs2, xs3, <rounding mode> (RV32/64Zfinx)
fnmsub.s fd, fs1, fs2, fs3 (RV32/64F)
fnmsub.s xd, xs1, xs2, xs3 (RV32/64Zfinx)§frcsr
frcsr xd (RV32/64F or RV32/64Zfinx)§frflags
frflags xd (RV32/64F or RV32/64Zfinx)§fround.d
fround.d fd, fs1, <rounding mode> (RV32/64DZfa)
fround.d fd, fs1 (RV32/64DZfa)§fround.h
fround.h fd, fs1, <rounding mode> (RV32/64Zfa_Zfh)
fround.h fd, fs1 (RV32/64Zfa_Zfh)§fround.q
fround.q fd, fs1, <rounding mode> (RV32/64QZfa)
fround.q fd, fs1 (RV32/64QZfa)§fround.s
fround.s fd, fs1, <rounding mode> (RV32/64FZfa)
fround.s fd, fs1 (RV32/64FZfa)§froundnx.d
froundnx.d fd, fs1, <rounding mode> (RV32/64DZfa)
froundnx.d fd, fs1 (RV32/64DZfa)§froundnx.h
froundnx.h fd, fs1, <rounding mode> (RV32/64Zfa_Zfh)
froundnx.h fd, fs1 (RV32/64Zfa_Zfh)§froundnx.q
froundnx.q fd, fs1, <rounding mode> (RV32/64QZfa)
froundnx.q fd, fs1 (RV32/64QZfa)§froundnx.s
froundnx.s fd, fs1, <rounding mode> (RV32/64FZfa)
froundnx.s fd, fs1 (RV32/64FZfa)§frrm
frrm xd (RV32/64F or RV32/64Zfinx)§fscsr
fscsr xd, xs1 (RV32/64F or RV32/64Zfinx)§fsd
fsd fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64D)
fsd fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64D)
fsd fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64D)§fsflags
fsflags xd, xs1 (RV32/64F or RV32/64Zfinx)§fsflagsi
fsflagsi xd, uimm (uimm <= 0x1F) (RV32/64F or RV32/64Zfinx)§fsgnj.d
fsgnj.d fd, fs1, fs2 (RV32/64D)
fsgnj.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fsgnj.d xd, xs1, xs2 (RV64Zdinx)§fsgnj.h
fsgnj.h fd, fs1, fs2 (RV32/64Zfh)
fsgnj.h xd, xs1, xs2 (RV32/64Zhinx)§fsgnj.q
fsgnj.q fd, fs1, fs2 (RV32/64Q)§fsgnj.s
fsgnj.s fd, fs1, fs2 (RV32/64F)
fsgnj.s xd, xs1, xs2 (RV32/64Zfinx)§fsgnjn.d
fsgnjn.d fd, fs1, fs2 (RV32/64D)
fsgnjn.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fsgnjn.d xd, xs1, xs2 (RV64Zdinx)§fsgnjn.h
fsgnjn.h fd, fs1, fs2 (RV32/64Zfh)
fsgnjn.h xd, xs1, xs2 (RV32/64Zhinx)§fsgnjn.q
fsgnjn.q fd, fs1, fs2 (RV32/64Q)§fsgnjn.s
fsgnjn.s fd, fs1, fs2 (RV32/64F)
fsgnjn.s xd, xs1, xs2 (RV32/64Zfinx)§fsgnjx.d
fsgnjx.d fd, fs1, fs2 (RV32/64D)
fsgnjx.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fsgnjx.d xd, xs1, xs2 (RV64Zdinx)§fsgnjx.h
fsgnjx.h fd, fs1, fs2 (RV32/64Zfh)
fsgnjx.h xd, xs1, xs2 (RV32/64Zhinx)§fsgnjx.q
fsgnjx.q fd, fs1, fs2 (RV32/64Q)§fsgnjx.s
fsgnjx.s fd, fs1, fs2 (RV32/64F)
fsgnjx.s xd, xs1, xs2 (RV32/64Zfinx)§fsh
fsh fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64Zfh or RV32/64Zfhmin)
fsh fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64Zfh or RV32/64Zfhmin)
fsh fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64Zfh or RV32/64Zfhmin)§fsq
fsq fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64Q)
fsq fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64Q)
fsq fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64Q)§fsqrt.d
fsqrt.d fd, fs1, <rounding mode> (RV32/64D)
fsqrt.d xd, xs1, <rounding mode> (d is even, s1 is even) (RV32Zdinx)
fsqrt.d xd, xs1, <rounding mode> (RV64Zdinx)
fsqrt.d fd, fs1 (RV32/64D)
fsqrt.d xd, xs1 (d is even, s1 is even) (RV32Zdinx)
fsqrt.d xd, xs1 (RV64Zdinx)§fsqrt.h
fsqrt.h fd, fs1, <rounding mode> (RV32/64Zfh)
fsqrt.h xd, xs1, <rounding mode> (RV32/64Zhinx)
fsqrt.h fd, fs1 (RV32/64Zfh)
fsqrt.h xd, xs1 (RV32/64Zhinx)§fsqrt.q
fsqrt.q fd, fs1, <rounding mode> (RV32/64Q)
fsqrt.q fd, fs1 (RV32/64Q)§fsqrt.s
fsqrt.s fd, fs1, <rounding mode> (RV32/64F)
fsqrt.s xd, xs1, <rounding mode> (RV32/64Zfinx)
fsqrt.s fd, fs1 (RV32/64F)
fsqrt.s xd, xs1 (RV32/64Zfinx)§fsrm
fsrm xd, xs1 (RV32/64F or RV32/64Zfinx)§fsrmi
fsrmi xd, uimm (uimm <= 0x1F) (RV32/64F or RV32/64Zfinx)§fsub.d
fsub.d fd, fs1, fs2, <rounding mode> (RV32/64D)
fsub.d xd, xs1, xs2, <rounding mode> (d is even, s1 is even, s2 is even) (RV32Zdinx)
fsub.d xd, xs1, xs2, <rounding mode> (RV64Zdinx)
fsub.d fd, fs1, fs2 (RV32/64D)
fsub.d xd, xs1, xs2 (d is even, s1 is even, s2 is even) (RV32Zdinx)
fsub.d xd, xs1, xs2 (RV64Zdinx)§fsub.h
fsub.h fd, fs1, fs2, <rounding mode> (RV32/64Zfh)
fsub.h xd, xs1, xs2, <rounding mode> (RV32/64Zhinx)
fsub.h fd, fs1, fs2 (RV32/64Zfh)
fsub.h xd, xs1, xs2 (RV32/64Zhinx)§fsub.q
fsub.q fd, fs1, fs2, <rounding mode> (RV32/64Q)
fsub.q fd, fs1, fs2 (RV32/64Q)§fsub.s
fsub.s fd, fs1, fs2, <rounding mode> (RV32/64F)
fsub.s xd, xs1, xs2, <rounding mode> (RV32/64Zfinx)
fsub.s fd, fs1, fs2 (RV32/64F)
fsub.s xd, xs1, xs2 (RV32/64Zfinx)§fsw
fsw fv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64F)
fsw fv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64F)
fsw fd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64F)§j
j <offset> (offset is 19 bits, 2-byte aligned) (RV32/64I)§jal
jal xd, <offset> (offset is 19 bits, 2-byte aligned) (RV32/64I)
jal <offset> (offset is 19 bits, 2-byte aligned) (RV32/64I)§jalr
jalr xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)
jalr xd, xs1, <offset> (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
jalr xd (RV32/64I)§jr
jr xd (RV32/64I)§jump
jump <offset>, xd (offset is 32 bits, d cannot be 0) (RV32/64I)§la
la xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§lb
lb xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
lb xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
lb xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§lbu
lbu xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
lbu xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
lbu xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§ld
ld xv, [xb, simm] (-2048 <= simm <= 2047) (RV64I)
ld xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV64I)
ld xd, <offset> (d cannot be 0, offset is 32 bits) (RV64I)§lh
lh xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
lh xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
lh xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§lhu
lhu xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
lhu xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
lhu xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§li
li xd, simm (-0x80000000 <= simm <= 0x7FFFFFFF) (RV32I)
li xd, simm (-0x8000000000000000 <= simm <= 0x7FFFFFFFFFFFFFFF) (RV64I)§li.12
li.12 xd, simm (-2048 <= simm <= 2047) (RV32/64I)§li.32
li.32 xd, simm (-0x80000000 <= simm <= 0x7FFFFFFF) (RV64I)§li.43
li.43 xd, simm (-0x40000000000 <= simm <= 0x3FFFFFFFFFF) (RV64I)§li.54
li.54 xd, simm (-0x20000000000000 <= simm <= 0x1FFFFFFFFFFFFF) (RV64I)§lpad
lpad uimm (uimm <= 0xFFFFF) (RV32/64Zicfilp)§lr.d
lr.d xd, [xs1] (RV64A)§lr.d.aq
lr.d.aq xd, [xs1] (RV64A)§lr.d.aqrl
lr.d.aqrl xd, [xs1] (RV64A)§lr.d.rl
lr.d.rl xd, [xs1] (RV64A)§lr.w
lr.w xd, [xs1] (RV32/64A)§lr.w.aq
lr.w.aq xd, [xs1] (RV32/64A)§lr.w.aqrl
lr.w.aqrl xd, [xs1] (RV32/64A)§lr.w.rl
lr.w.rl xd, [xs1] (RV32/64A)§lui
lui xd, simm (-0x80000000 <= simm <= 0x7FFFF000, simm = 0x1000 * N) (RV32/64I)§lw
lw xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
lw xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
lw xd, <offset> (d cannot be 0, offset is 32 bits) (RV32/64I)§lwu
lwu xv, [xb, simm] (-2048 <= simm <= 2047) (RV64I)
lwu xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV64I)
lwu xd, <offset> (d cannot be 0, offset is 32 bits) (RV64I)§max
max xd, xs1, xs2 (RV32/64Zbb)§maxu
maxu xd, xs1, xs2 (RV32/64Zbb)§min
min xd, xs1, xs2 (RV32/64Zbb)§minu
minu xd, xs1, xs2 (RV32/64Zbb)§mop.r.0
mop.r.0 xd, xs1 (RV32/64Zimop)§mop.r.1
mop.r.1 xd, xs1 (RV32/64Zimop)§mop.r.10
mop.r.10 xd, xs1 (RV32/64Zimop)§mop.r.11
mop.r.11 xd, xs1 (RV32/64Zimop)§mop.r.12
mop.r.12 xd, xs1 (RV32/64Zimop)§mop.r.13
mop.r.13 xd, xs1 (RV32/64Zimop)§mop.r.14
mop.r.14 xd, xs1 (RV32/64Zimop)§mop.r.15
mop.r.15 xd, xs1 (RV32/64Zimop)§mop.r.16
mop.r.16 xd, xs1 (RV32/64Zimop)§mop.r.17
mop.r.17 xd, xs1 (RV32/64Zimop)§mop.r.18
mop.r.18 xd, xs1 (RV32/64Zimop)§mop.r.19
mop.r.19 xd, xs1 (RV32/64Zimop)§mop.r.2
mop.r.2 xd, xs1 (RV32/64Zimop)§mop.r.20
mop.r.20 xd, xs1 (RV32/64Zimop)§mop.r.21
mop.r.21 xd, xs1 (RV32/64Zimop)§mop.r.22
mop.r.22 xd, xs1 (RV32/64Zimop)§mop.r.23
mop.r.23 xd, xs1 (RV32/64Zimop)§mop.r.24
mop.r.24 xd, xs1 (RV32/64Zimop)§mop.r.25
mop.r.25 xd, xs1 (RV32/64Zimop)§mop.r.26
mop.r.26 xd, xs1 (RV32/64Zimop)§mop.r.27
mop.r.27 xd, xs1 (RV32/64Zimop)§mop.r.28
mop.r.28 xd, xs1 (RV32/64Zimop)§mop.r.29
mop.r.29 xd, xs1 (RV32/64Zimop)§mop.r.3
mop.r.3 xd, xs1 (RV32/64Zimop)§mop.r.30
mop.r.30 xd, xs1 (RV32/64Zimop)§mop.r.31
mop.r.31 xd, xs1 (RV32/64Zimop)§mop.r.4
mop.r.4 xd, xs1 (RV32/64Zimop)§mop.r.5
mop.r.5 xd, xs1 (RV32/64Zimop)§mop.r.6
mop.r.6 xd, xs1 (RV32/64Zimop)§mop.r.7
mop.r.7 xd, xs1 (RV32/64Zimop)§mop.r.8
mop.r.8 xd, xs1 (RV32/64Zimop)§mop.r.9
mop.r.9 xd, xs1 (RV32/64Zimop)§mop.r.N
mop.r.N uimm, xd, xs1 (uimm <= 0x1F) (RV32/64Zimop)§mop.rr.0
mop.rr.0 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.1
mop.rr.1 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.2
mop.rr.2 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.3
mop.rr.3 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.4
mop.rr.4 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.5
mop.rr.5 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.6
mop.rr.6 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.7
mop.rr.7 xd, xs1, xs2 (RV32/64Zimop)§mop.rr.N
mop.rr.N uimm, xd, xs1, xs2 (uimm <= 0x7) (RV32/64Zimop)§mul
mul xd, xs1, xs2 (RV32/64M)§mulh
mulh xd, xs1, xs2 (RV32/64M)§mulhsu
mulhsu xd, xs1, xs2 (RV32/64M)§mulhu
mulhu xd, xs1, xs2 (RV32/64M)§mulw
mulw xd, xs1, xs2 (RV64M)§mv
mv xd, xs1 (RV32/64I)§neg
neg xd, xs1 (RV32/64I)§negw
negw xd, xs1 (RV64I)§nop
nop (RV32/64I)§not
not xd, xs1 (RV32/64I)§ntl.all
ntl.all (RV32/64Zihintntl)§ntl.p1
ntl.p1 (RV32/64Zihintntl)§ntl.pall
ntl.pall (RV32/64Zihintntl)§ntl.s1
ntl.s1 (RV32/64Zihintntl)§or
or xd, xs1, xs2 (RV32/64I)§orc.b
orc.b xd, xs1 (RV32/64Zbb)§ori
ori xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)§orn
orn xd, xs1, xs2 (RV32/64Zbb or RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§pack
pack xd, xs1, xs2 (RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§packh
packh xd, xs1, xs2 (RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§packw
packw xd, xs1, xs2 (RV64Zbkb or RV64Zk or RV64Zkn or RV64Zks)§pause
pause (RV32/64Zihintpause)§prefetch.i
prefetch.i [xb, simm] (-2048 <= simm <= 2016, simm = 32 * N) (RV32/64Zicbop)§prefetch.r
prefetch.r [xb, simm] (-2048 <= simm <= 2016, simm = 32 * N) (RV32/64Zicbop)§prefetch.w
prefetch.w [xb, simm] (-2048 <= simm <= 2016, simm = 32 * N) (RV32/64Zicbop)§rdcycle
rdcycle xd (RV32/64Zicntr)§rdcycleh
rdcycleh xd (RV32Zicntr)§rdinstret
rdinstret xd (RV32/64Zicntr)§rdinstreth
rdinstreth xd (RV32Zicntr)§rdtime
rdtime xd (RV32/64Zicntr)§rdtimeh
rdtimeh xd (RV32Zicntr)§rem
rem xd, xs1, xs2 (RV32/64M)§remu
remu xd, xs1, xs2 (RV32/64M)§remuw
remuw xd, xs1, xs2 (RV64M)§remw
remw xd, xs1, xs2 (RV64M)§ret
ret (RV32/64I)§rev8
rev8 xd, xs1 (RV32Zbb or RV32Zbkb or RV32Zk or RV32Zkn or RV32Zks)
rev8 xd, xs1 (RV64Zbb or RV64Zbkb or RV64Zk or RV64Zkn or RV64Zks)§rol
rol xd, xs1, xs2 (RV32/64Zbb or RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§rolw
rolw xd, xs1, xs2 (RV64Zbb or RV64Zbkb or RV64Zk or RV64Zkn or RV64Zks)§ror
ror xd, xs1, xs2 (RV32/64Zbb or RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§rori
rori xd, xs1, uimm (uimm <= 0x1F) (RV32Zbb or RV32Zbkb or RV32Zk or RV32Zkn or RV32Zks)
rori xd, xs1, uimm (uimm <= 0x3F) (RV64Zbb or RV64Zbkb or RV64Zk or RV64Zkn or RV64Zks)§roriw
roriw xd, xs1, uimm (uimm <= 0x1F) (RV64Zbb or RV64Zbkb or RV64Zk or RV64Zkn or RV64Zks)§rorw
rorw xd, xs1, xs2 (RV64Zbb or RV64Zbkb or RV64Zk or RV64Zkn or RV64Zks)§sb
sb xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
sb xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
sb xd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64I)§sbreak
sbreak (RV32/64I)§sc.d
sc.d xd, xs1, [xs2] (RV64A)§sc.d.aq
sc.d.aq xd, xs1, [xs2] (RV64A)§sc.d.aqrl
sc.d.aqrl xd, xs1, [xs2] (RV64A)§sc.d.rl
sc.d.rl xd, xs1, [xs2] (RV64A)§sc.w
sc.w xd, xs1, [xs2] (RV32/64A)§sc.w.aq
sc.w.aq xd, xs1, [xs2] (RV32/64A)§sc.w.aqrl
sc.w.aqrl xd, xs1, [xs2] (RV32/64A)§sc.w.rl
sc.w.rl xd, xs1, [xs2] (RV32/64A)§scall
scall (RV32/64I)§sd
sd xv, [xb, simm] (-2048 <= simm <= 2047) (RV64I)
sd xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV64I)
sd xd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV64I)§seqz
seqz xd, xs1 (RV32/64I)§sext.b
sext.b xd, xs1 (RV32/64Zbb)
sext.b xd, xs1 (RV32I)
sext.b xd, xs1 (RV64I)§sext.h
sext.h xd, xs1 (RV32/64Zbb)
sext.h xd, xs1 (RV32I)
sext.h xd, xs1 (RV64I)§sext.w
sext.w xd, xs1 (RV64I)§sgtz
sgtz xd, xs1 (RV32/64I)§sh
sh xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
sh xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
sh xd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64I)§sh1add
sh1add xd, xs1, xs2 (RV32/64Zba)§sh1add.uw
sh1add.uw xd, xs1, xs2 (RV64Zba)§sh2add
sh2add xd, xs1, xs2 (RV32/64Zba)§sh2add.uw
sh2add.uw xd, xs1, xs2 (RV64Zba)§sh3add
sh3add xd, xs1, xs2 (RV32/64Zba)§sh3add.uw
sh3add.uw xd, xs1, xs2 (RV64Zba)§sha256sig0
sha256sig0 xd, xs1 (RV32/64Zk or RV32/64Zkn or RV32/64Zknh)§sha256sig1
sha256sig1 xd, xs1 (RV32/64Zk or RV32/64Zkn or RV32/64Zknh)§sha256sum0
sha256sum0 xd, xs1 (RV32/64Zk or RV32/64Zkn or RV32/64Zknh)§sha256sum1
sha256sum1 xd, xs1 (RV32/64Zk or RV32/64Zkn or RV32/64Zknh)§sha512sig0
sha512sig0 xd, xs1 (RV64Zk or RV64Zkn or RV64Zknh)§sha512sig0h
sha512sig0h xd, xs1, xs2 (RV32Zk or RV32Zkn or RV32Zknh)§sha512sig0l
sha512sig0l xd, xs1, xs2 (RV32Zk or RV32Zkn or RV32Zknh)§sha512sig1
sha512sig1 xd, xs1 (RV64Zk or RV64Zkn or RV64Zknh)§sha512sig1h
sha512sig1h xd, xs1, xs2 (RV32Zk or RV32Zkn or RV32Zknh)§sha512sig1l
sha512sig1l xd, xs1, xs2 (RV32Zk or RV32Zkn or RV32Zknh)§sha512sum0
sha512sum0 xd, xs1 (RV64Zk or RV64Zkn or RV64Zknh)§sha512sum0r
sha512sum0r xd, xs1, xs2 (RV32Zk or RV32Zkn or RV32Zknh)§sha512sum1
sha512sum1 xd, xs1 (RV64Zk or RV64Zkn or RV64Zknh)§sha512sum1r
sha512sum1r xd, xs1, xs2 (RV32Zk or RV32Zkn or RV32Zknh)§sll
sll xd, xs1, xs2 (RV32/64I)§slli
slli xd, xs1, uimm (uimm <= 0x1F) (RV32I)
slli xd, xs1, uimm (uimm <= 0x3F) (RV64I)§slli.uw
slli.uw xd, xs1, uimm (uimm <= 0x3F) (RV64Zba)§slliw
slliw xd, xs1, uimm (uimm <= 0x1F) (RV64I)§sllw
sllw xd, xs1, xs2 (RV64I)§slt
slt xd, xs1, xs2 (RV32/64I)§slti
slti xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)§sltiu
sltiu xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)§sltu
sltu xd, xs1, xs2 (RV32/64I)§sltz
sltz xd, xs1 (RV32/64I)§sm3p0
sm3p0 xd, xs1 (RV32/64Zks or RV32/64Zksh)§sm3p1
sm3p1 xd, xs1 (RV32/64Zks or RV32/64Zksh)§sm4ed
sm4ed xd, xs1, xs2, uimm (uimm <= 0x3) (RV32/64Zks or RV32/64Zksed)§sm4ks
sm4ks xd, xs1, xs2, uimm (uimm <= 0x3) (RV32/64Zks or RV32/64Zksed)§snez
snez xd, xs1 (RV32/64I)§sra
sra xd, xs1, xs2 (RV32/64I)§srai
srai xd, xs1, uimm (uimm <= 0x1F) (RV32I)
srai xd, xs1, uimm (uimm <= 0x3F) (RV64I)§sraiw
sraiw xd, xs1, uimm (uimm <= 0x1F) (RV64I)§sraw
sraw xd, xs1, xs2 (RV64I)§srl
srl xd, xs1, xs2 (RV32/64I)§srli
srli xd, xs1, uimm (uimm <= 0x1F) (RV32I)
srli xd, xs1, uimm (uimm <= 0x3F) (RV64I)§srliw
srliw xd, xs1, uimm (uimm <= 0x1F) (RV64I)§srlw
srlw xd, xs1, xs2 (RV64I)§ssamoswap.d
ssamoswap.d xd, xs1, [xs2] (RV64Zicfiss)§ssamoswap.d.aq
ssamoswap.d.aq xd, xs1, [xs2] (RV64Zicfiss)§ssamoswap.d.aqrl
ssamoswap.d.aqrl xd, xs1, [xs2] (RV64Zicfiss)§ssamoswap.d.rl
ssamoswap.d.rl xd, xs1, [xs2] (RV64Zicfiss)§ssamoswap.w
ssamoswap.w xd, xs1, [xs2] (RV32/64Zicfiss)§ssamoswap.w.aq
ssamoswap.w.aq xd, xs1, [xs2] (RV32/64Zicfiss)§ssamoswap.w.aqrl
ssamoswap.w.aqrl xd, xs1, [xs2] (RV32/64Zicfiss)§ssamoswap.w.rl
ssamoswap.w.rl xd, xs1, [xs2] (RV32/64Zicfiss)§sspopchk
sspopchk x1 (RV32/64Zicfiss)
sspopchk x5 (RV32/64Zicfiss)§sspush
sspush x1 (RV32/64Zicfiss)
sspush x5 (RV32/64Zicfiss)§ssrdp
ssrdp xd (d cannot be 0) (RV32/64Zicfiss)§sub
sub xd, xs1, xs2 (RV32/64I)§subw
subw xd, xs1, xs2 (RV64I)§sw
sw xv, [xb, simm] (-2048 <= simm <= 2047) (RV32/64I)
sw xv, [xb, <offset>] (offset is the 12 lowest bits of a 32-bit offset) (RV32/64I)
sw xd, <offset>, xs1 (offset is 32 bits, s1 cannot be 0) (RV32/64I)§tail
tail <offset> (offset is 32 bits) (RV32/64Zicfilp)
tail <offset> (offset is 32 bits) (RV32/64I)§unimp
unimp (RV32/64I)§unzip
unzip xd, xs1 (RV32Zbkb or RV32Zk or RV32Zkn or RV32Zks)§wrs.nto
wrs.nto (RV32/64Zawrs)§wrs.sto
wrs.sto (RV32/64Zawrs)§xnor
xnor xd, xs1, xs2 (RV32/64Zbb or RV32/64Zbkb or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§xor
xor xd, xs1, xs2 (RV32/64I)§xori
xori xd, xs1, simm (-2048 <= simm <= 2047) (RV32/64I)§xperm4
xperm4 xd, xs1, xs2 (RV32/64Zbkx or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§xperm8
xperm8 xd, xs1, xs2 (RV32/64Zbkx or RV32/64Zk or RV32/64Zkn or RV32/64Zks)§zext.b
zext.b xd, xs1 (RV32/64I)§zext.h
zext.h xd, xs1 (RV32Zbb)
zext.h xd, xs1 (RV64Zbb)
zext.h xd, xs1 (RV32I)
zext.h xd, xs1 (RV64I)§zext.w
zext.w xd, xs1 (RV64Zba)
zext.w xd, xs1 (RV64I)§zip
zip xd, xs1 (RV32Zbkb or RV32Zk or RV32Zkn or RV32Zks)